Yi Zou manages the data science product engineering teams at ASML Silicon Valley. ASML develops sophisticated software and metrology solutions, addressing escalating complexities encountered at smaller nodes.
What was it that interested you to pursue engineering?
As a child, I was always very inquisitive and interested in understanding how things work. This led me to gravitate to subjects like science in high school, but quickly realized engineers were the people who designed and built solutions to address real problems and make a positive impact to our world.
In college, I also appreciated how engineering degrees focused on developing other important skills, beyond the fundamentals of physics and mathematics, that are highly transferrable in the job market to many different careers. Engineers acquire strong analytical thinking and critical problem solving skills, as well as the ability to transition between big picture thinking to a detail-oriented approach needed to bring ideas to life – from creative concept to system design to end product.
Can you share with us your journey of how you became the Sr. Director of Engineering at ASML?
In 2014, I joined ASML from GlobalFoundries, an American semiconductor company who design and fabricate silicon chips. As a member of the Advanced Technology Development team at ASML Silicon Valley, I led several research projects focused on evaluating and prototyping lithography techniques used to improve the manufacturing process of chips, such as improved pattern resolution.
Over the same time period, I built a technical team that specialized in machine learning. We demonstrated the feasibility of applying deep learning to several critical applications, which led to the development of a new product family. I also led close collaboration with a leading chipmaking company to explore data science applications within high-volume manufacturing fabs (factories where chips are made). This led to the creation of several new added-value opportunities for ASML. Since my latest promotion in 2019, I’m continuing to expand data science techniques to our broader customer market.
ASML is an innovation leader in the semiconductor industry, as they provide chipmakers with everything they need – hardware, software and services – to mass produce patterns on silicon through lithography. Can you quickly summarize what lithography is in reference to designing computer chips?
The work that ASML does is a key ingredient to making chips more powerful, cheaper, more energy-efficient and more ubiquitous. It starts with our lithography system, which essentially is a projection system, that uses ultraviolet light to create billions of tiny structures on thin slices of silicon.
Light is projected onto a blueprint of the pattern (known as a ‘reticle’ or ‘mask’) that will be printed. Optics focus the pattern onto the silicon wafer, which has earlier been coated with a light-sensitive chemical. When the unexposed parts are etched away, a three-dimensional pattern is revealed. The process is repeated time and again in that step-and-scan system, which measure and expose in parallel.
Those chips form what amounts to a multi-story “city” of circuits with billions of tiny connections on wafer-thin layers. Together, these structures make up an integrated circuit, or chip. The more structures that chipmakers can cram on a chip, the faster and more powerful it is.
ASML has two main types of lithography systems. To begin could you explain what the EUV lithography system is?
EUV represents the biggest step in lithography advancement since the beginning. The tricky thing with EUV light is that it’s absorbed by everything, even air. It is also notoriously hard to generate.
An EUV lithography system has a large high-vacuum chamber in which the light can travel far enough to land on the wafer. The light is guided by a series of ultra-reflective mirrors. An EUV system uses a high-energy laser that fires on a microscopic droplet of molten tin (that’s travelling 50,000 times per second) and turns it into plasma, emitting EUV light, which then is focused into a beam.
Can you explain how the DUV lithography system differs from the EUV lithography system?
Our DUV lithography system is the industry’s workhorse that are used to manufacture a broad range of semiconductor nodes and technologies. EUV is used alongside DUV systems at the most advanced nodes and critical layers to drive affordable scaling.
One of the really impressive aspects of ASML, is how the company refurbishes old systems such as the ‘classic’ PAS 5500 and TWINSCAN lithography systems. What are they currently being refurbished for?
Both Moore’s Law and More than Moore fuel demand for our cost-effective solutions, driving sales of both newly build TWINSCAN immersion and dry systems, as well as refurbished PAS 5500 and TWINSCAN steppers and scanners.
What’s the current nanometer wavelength ASML can work with?
ASML’s most advanced EUV lithography systems delivers 13.5 nm wavelength of EUV light.
Moore’s Law has been consistent for multiple decades now, do you believe that Moore’s Law is near its end or that it can be further stretched out?
Extending Moore’s Law is becoming increasingly difficult and costly, but it is not dead. We aren’t as close to the fundamental limits of physics as some would have us believe. Next-generation chip designs will include more exotic materials, new packaging technologies and more complex 3D designs. These new designs will enable the next big waves of innovation, like advanced artificial intelligence and fast connectivity with 5G, as well as generate consumer products we haven’t even conceived yet.
I personally work within ASML’s Applications business focused on developing software solutions to extend the performance capabilities of our hardware, which is used by chipmakers to mass produce ever-smaller patterns on silicon. It would be impossible for our lithography systems to manufacture chips at increasingly small dimensions without the software we develop.
Our team of engineers is constantly working to understand and model the physical effects that influence the patterning process, so we can predict how a design pattern will be printed onto a silicon wafer and optimize its shape to generate the image we want.
This is an iterative, computationally intensive process that requires the efficient and accurate utilization of a large scale, distributed high-performance computing architecture. Today’s advanced chips have billions of transistors, meaning we must simulate and optimize the imaging of billions of patterns. In order to achieve this with extreme accuracy within 24 hours, we must find clever ways to continue improving model performance, in terms of accuracy and runtime.
As these chip layouts become more complex to extend Moore’s Law, machine learning can dramatically speed up a key part of the simulation and manufacturing process. Within the teams at ASML Silicon Valley, data scientists are researching how to design a new neural network to help understand complex physics that is unknown to physical model and then use the neural network to augment physical modeling approach.
The methodology used to develop rigorous physical models and machine learning models are very similar. Both need lots of experimental results and data to shape the prediction, but machine learning saves a lot of time and effort, while improving accuracy. It also presents an opportunity to more fully utilize the large amounts of data generated in a manufacturing environment to enhance process control.
This is but one example to illustrate the broader theme across our industry: As long as there are technologists tasked with the mission to extend Moore’s Law, new innovative solutions will address the scaling problem via many different creative avenues.
Is there anything else that you would like to share about ASML?
In Silicon Valley, ASML employs a highly specialized software powerhouse dedicated to extending Moore’s Law by tapping into its unique expertise in physical modeling and numerical algorithms.
This positions us to focus on several key imperatives for the company, including:
- Leverage ever-growing computational power to further advance our machine learning applications focused on simulating the lithography process to extend Moore’s Law,
- Integrate our computational and metrology competencies to further improve model accuracy, as well as generate and better utilize large amount of high-quality image data to improve patterning optimization technology, and
- Support and extend our computational solutions for the next-generation EUV lithography roadmap to support the continuation of Moore’s Law.
While these are different product roadmaps, each parallel path is crucial to further maintaining chipmaker’s aggressive scaling efforts. And machine learning is an enabling technology used in each path. Our innovations don’t only drive forward an entire consumer technology industry, but also drives further innovation within our own products as we gain ever-increasing computational power.
Thank you for answering all of our questions. Readers who wish to learn more should visit at ASML Silicon Valley