Google Adds TPU 8Tx and TPU 8I Max to Eighth-Generation Lineup

Google announced TPU 8tx and TPU 8i Max on November 9, 2026, expanding its eighth-generation accelerator portfolio. TPU 8tx targets confidential inference and small-scale training, while TPU 8i Max is built for massive context windows and higher rack density.

Google said the additions make 2026 the first year in which it has introduced four TPU systems, and put the TPU customer count at nearly 100 across frontier labs, trading firms, retailers and universities. The broader TPU business spans Google Cloud infrastructure and deployments in customers’ own data centers.

TPU 8Tx Protects Data During Processing

TPU 8tx is built for regulated enterprises and governments running frontier or proprietary models and autonomous agents alongside sensitive data. It addresses a gap in conventional encryption: information can be encrypted at rest and in transit, yet must be decrypted in memory while computation runs. The hardware is intended to keep sensitive data and model weights isolated even during active processing.

The system uses the same silicon as the training-focused TPU 8t, but pairs it with 5th Generation AMD EPYC CPU hosts. It also adopts the low-latency Boardfly network developed for real-time reasoning. Google reports up to 2x lower latency than TPU 8t, with almost no offsetting performance loss.

That combination lets organizations run and customize models on one system. Teams can fine-tune models on private data, distill larger models into smaller ones and train agents through reinforcement learning. Private information can remain on that system for all three tasks instead of being transferred between separate clusters.

TPU 8I Max Targets Memory and Rack Density

TPU 8i Max is aimed at workloads in which dozens of agents work across a complete software codebase or hours of video simultaneously, causing memory bandwidth to become the bottleneck. Google’s response is a single package containing two low-latency TPU 8i chips.

Google reports that the package delivers double the compute, double the on-chip SRAM and double the high-bandwidth memory (HBM) bandwidth of TPU 8i. The package also fits within the existing rack footprint, allowing data centers to deploy more computing power per square foot and per watt for context-heavy workloads.

The underlying TPU 8i and TPU 8t were introduced at Google Cloud Next on April 22, 2026, for real-time reasoning and large-scale training, respectively. The 8i design pairs 288 GB of high-bandwidth memory with 384 MB of on-chip SRAM, providing the baseline for the memory resources that 8i Max scales.

Modular Systems Reuse Eighth-Generation Silicon

Google distinguishes these launches from the arrival of new base chips. A new chip requires billions of transistors to be laid out through a multi-year design and manufacturing cycle. A system instead determines how compute, networking, storage, packaging and security are assembled around that silicon.

Its modular AI Hypercomputer approach treats TPUs as building blocks whose memory, optical networking, packaging and security can be adjusted. Google said engineers can deliver specialized supercomputers in months rather than the years required for new silicon. The two additions apply that method differently: 8tx changes the hosts, network and security around training silicon, while 8i Max changes the package around inference silicon.

The company has long co-designed TPUs with Google DeepMind, but said external organizations are increasingly shaping requirements with requests for massive context windows and specialized encryption for regulated workloads. Those requests correspond directly to the two new systems.

The launches make system design the immediate lever for specialization in Google’s accelerator line. Confidential inference and massive-context agents present different hardware constraints, but both are being addressed on existing eighth-generation silicon, allowing Google to segment its infrastructure offerings without waiting for another base-chip generation.