AI Models & Platforms
Microsoft Announces Maia 300 AI Chip, Multi-Gigawatt Azure Scale-Up

Microsoft on October 12, 2026 introduced Azure Maia 300, the third generation of its in-house AI accelerator family, and said it will scale the Azure Maia family to multi-gigawatt deployments starting in 2027, making Maia the primary inference system across its products and services.
Scott Guthrie, executive vice president of Cloud + AI, announced the chip in an Official Microsoft Blog post, describing Maia 300 as a “complete intelligent system” designed for long-context reasoning, latency-sensitive conversational experiences and sustained, multi-step agentic tasks. Maia 300 will begin production deployments in 2027.
By improving efficiency across the system, Microsoft expects Maia 300 to deliver 40% more tokens per megawatt compared with leading GPU-based systems, Guthrie wrote. In a full 96-accelerator configuration, the company said, Maia 300 delivers up to 7x the rack-scale token throughput of Maia 200.
Maia 300 System Architecture
Maia 300 is designed with what Microsoft calls an inference-first architecture optimized for long-context, memory-intensive and decode-heavy AI workloads, an approach the company says involves balancing compute, memory bandwidth, networking and power efficiency at cloud scale. Its software-defined dataflow architecture pairs with AI-assisted kernel optimization to keep data local, cut data movement and raise utilization across compute, memory and networking resources. Microsoft says treating dataflow as a first-class design principle gives Maia 300 a significant performance-per-watt advantage over traditional GPU architectures.
The memory system uses eight HBM4 stacks delivering 18.0 TB/s of peak bandwidth inside a 950-watt TDP, and specialized kernel support treats on-die SRAM as a software-managed scratchpad to ease pressure on HBM. The chip also moves to a multi-chiplet design that splits compute, memory-controller and I/O functions apart, with the compute chiplets built on TSMC’s N2P process node. Support for advanced low-precision formats, including enhanced MXFP4, is designed to reduce memory and bandwidth requirements for both computation and KV-cache storage, enabling larger context windows and higher throughput within the same power envelope.
On the networking side, Maia 300 treats the network as an extension of its dataflow architecture rather than moving data through separate communication layers. High-bandwidth interconnects between accelerators are optimized for tensor parallelism, and a custom AI transport provides scale-up communication across accelerators and racks over Ethernet-based infrastructure, forming a unified topology that scales from a single rack to datacenter-scale deployments. At rack level, 96 Maia 300 accelerators operate within a 167-kilowatt power envelope, with 27.6 TB of HBM capacity and 1.7 PB/s of aggregate HBM bandwidth across the scale-up domain. Microsoft says that density allows it to serve more simultaneous AI interactions and larger workloads from each rack.
Maia 200 in Production
Maia 300 follows Maia 200, which is already serving Microsoft production workloads including Microsoft Copilot and supporting the MAI team as it develops next-generation models, with GitHub Copilot and Microsoft Foundry to follow by the end of 2026. Across these workloads, the chip runs OpenAI models, Microsoft’s own MAI models and leading open-source model families. Maia 200 is deploying across the United States, Europe and Australia, and Microsoft says it is delivering up to 1.7x more tokens per watt for built-in AI capabilities in Teams, Copilot and Cowork experiences compared with leading GPU infrastructure.
Guthrie wrote that experience running Microsoft’s AI models and services on Maia 200 directly informed the design of Maia 300. Together, he said, the two generations are designed to support a broad set of additional Microsoft AI services: multi-step agentic work behind GitHub coding experiences, cloud-scale model serving through Microsoft Foundry, inference and data generation for the MAI team, and latency-sensitive Dragon Copilot workflows intended to reduce clinicians’ administrative burden.
Microsoft introduced Maia 200 on January 26, 2026, as an inference accelerator fabricated on TSMC’s 3-nanometer process with native FP8 and FP4 tensor cores, 216GB of HBM3e memory at 7 TB/s and 272MB of on-chip SRAM. The chip packs more than 140 billion transistors and delivers over 10 petaFLOPS of FP4 compute and over 5 petaFLOPS at FP8 within a 750-watt TDP envelope. Its two-tier scale-up network is built on standard Ethernet, providing 2.8 TB/s of bidirectional scale-up bandwidth per accelerator across clusters of up to 6,144 accelerators. Maia 200 was first deployed in Microsoft’s US Central datacenter region near Des Moines, Iowa, with the US West 3 region near Phoenix, Arizona announced as the next region.
At that launch, Microsoft described Maia 200 as the most performant first-party silicon from any hyperscaler, citing three times the FP4 performance of the third-generation Amazon Trainium, FP8 performance above Google’s seventh-generation TPU, and 30% better performance per dollar than the newest hardware in its fleet. The company also called Maia 200 the most efficient inference system it had ever deployed.
Microsoft said it will share more on its strategy and Frontier Transformation progress at Microsoft Ignite 2026 in San Francisco and online, and pointed readers to a Maia 300 technical paper for further architectural detail.












