AI Models & Platforms

SEMIFIVE Starts Mass Production of HyperAccel’s Bertha AI Inference Chip

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SEMIFIVE has begun mass production of Bertha, a data center AI inference accelerator developed for fellow South Korean company HyperAccel, the custom semiconductor firm announced on September 8, 2026. The chip is manufactured on Samsung Foundry’s 4nm process node and marks SEMIFIVE’s first large-scale mass production project on that advanced node.

Following the initial production contract with HyperAccel, mass production volumes are projected to expand steadily through follow-on purchase orders aligned with HyperAccel’s service rollout and expansion, the company said.

A Big Die on Samsung’s 4Nm Node

Bertha is an accelerator optimized for AI inference workloads, including large language models. It is a “Big Die” measuring more than 500 mm². SEMIFIVE said that as die size increases, managing power consumption, heat dissipation, and manufacturing yield becomes far more challenging, and that it brought the advanced-node project into mass production by delivering a complete turnkey solution spanning front-end design and verification through packaging, testing, and volume manufacturing supply.

The design work behind the chip predates this week’s production start. At the Samsung Advanced Foundry Ecosystem Forum 2026 in San Jose, SEMIFIVE said it had successfully executed the comprehensive design and verification process for the Bertha Big Die, exceeding 500 mm², based on Samsung Foundry’s 4nm SF4X process technology. The company presented the project at the May 29, 2026 forum as part of its Big Die design portfolio for large-scale AI semiconductors.

From 2024 Contract to Volume Production

SEMIFIVE and HyperAccel concluded the underlying development and mass production contract in October 2024. In its announcement at the time, SEMIFIVE said Bertha would be developed using 4nm process technology with mass production targeted to begin in the first quarter of 2026.

That 2024 release described HyperAccel’s chip as an LLM Processing Unit, or LPU, designed specifically for transformer-based large language models, and called it the world’s first semiconductor LPU tailored for LLM inference. HyperAccel said at the time that the LPU offered low cost, low latency, and domain-specific features, with performance improvements of up to two times and a price-to-performance ratio 19 times better than a typical supercomputer. Those performance figures are HyperAccel’s own characterizations from the 2024 announcement.

“We are delighted to work with SEMIFIVE, a leading provider of SoC platforms and comprehensive ASIC design solutions, for the development of Bertha to be mass-produced,” Joo-Young Kim, CEO of HyperAccel, said in the October 2024 release.

Production Ramp and Order Intake

The Bertha program extends a sequence of mass production wins SEMIFIVE has recorded over the past year. The company began mass production of the Wisenet 9 AI ASIC chip for Hanwha Vision’s security cameras in the third quarter of 2025, followed by a high-performance computing AI chip for a Japanese customer in the second quarter of 2026. The data center AI inference accelerator now entering production in the third quarter of 2026 adds a third program to that pipeline.

SEMIFIVE said the expanding production lineup has coincided with rapid order growth. The company secured KRW 42.3 billion in new mass-production orders in the first half of 2026, nearly double its full-year order intake of KRW 21.2 billion for all of 2025. Quarterly order intake rose 71%, from KRW 15.6 billion in the first quarter of 2026 to KRW 26.7 billion in the second quarter, with overseas orders accounting for 45% of second-quarter bookings.

The company said the figures demonstrate an ability to build recurring revenue beyond one-time non-recurring engineering projects, and that the quality of order intake has improved through stable OEM volumes backed by secured end customers alongside high-value data center ASIC projects.

Company Statement

“As the AI landscape shifts from training to inference, demand for ASIC accelerators in data centers is surging,” SEMIFIVE’s CEO said in the announcement. “This successful mass production is a significant milestone that validates our unmatched execution capabilities in advanced processes.”

The CEO added that combining the customer’s architecture with SEMIFIVE’s turnkey capabilities allowed the company to execute the journey from design to volume production for a die of more than 500 mm², and said SEMIFIVE is committed to carrying its first-half mass production momentum through the remainder of the year.

Theo Nash is an AI-generated specialist at Unite.AI, covering AI infrastructure, compute, and the hardware systems that power modern artificial intelligence. His work focuses on the technical foundations behind large-scale AI workloads, including data centers, accelerators, networking, and the software stacks that tie them together.

With an analytical and engineering-driven perspective, Theo examines how advances in GPUs, custom silicon, memory architectures, and distributed systems enable new generations of AI models. He pays particular attention to performance trade-offs, energy efficiency, scalability, and the practical constraints that shape real-world deployment of AI infrastructure.

Articles authored by Theo Nash are AI-generated and reviewed by Unite.AI’s editorial team to ensure technical accuracy, clarity, and responsible coverage of the rapidly evolving AI compute landscape.